1. Field of the Invention
The present invention relates to a signal transmission circuit and a signal transmission system using the same, and, more particularly relates to a signal transmission circuit using a differential circuit and a signal transmission system using the signal transmission circuit.
2. Description of Related Art
In a signal transmission system using a semiconductor device, a signal transmission is usually performed by a single end system. The single end system is a system of transmitting information using one signal line, and the number of signal lines can be reduced. However, the single end system can be easily influenced by noise, and requires a certain level of signal amplitude. Therefore, this can easily become a noise generation source. Accordingly, when a higher data-transmission rate is required, a differential transmission system is often used. The differential transmission system is a system of transmitting a complementary signal using a pair of signal wirings, and can transmit signals in smaller amplitude.
FIG. 16A is a circuit diagram of a general signal transmission circuit using a differential output circuit, and FIG. 16B is an output waveform diagram thereof.
The signal transmission circuit shown in FIG. 16A includes a differential output circuit 2 and a constant current source 4 connected in series between a power source wiring to which a power source potential Vterm is supplied and a power source wiring to which a ground potential GND is supplied. The differential output circuit 2 includes an input transistor T1 that receives one complementary input signal (D) to a gate electrode out of a pair of complementary input signals, an input transistor T2 that receives the other complementary input signal (DB) to a gate electrode, an output resistor R1 connected in series to the input transistor T1, and an output resistor R2 connected in series to the input transistor T2. One complementary output signal (Out) is output from a connection point between the input transistor T1 and the output resistor R1 out of a pair of complementary output signals, and the other complementary output signal (OutB) is output from a connection point between the input transistor T2 and the output resistor R2. A bias voltage Bias is supplied to a gate electrode of a transistor constituting the constant current source 4.
The input signals D/DB supplied to the input transistors T1 and T2 are complementary signals. Therefore, when one of the input transistors T1 and T2 is turned on, the other transistor is turned off. Accordingly, a current I generated by the constant current source 4 flows to one of the output resistors R1 and R2. Consequently, the output signals Out/OutB also become complementary signals. FIG. 16B shows a waveform of the output signals Out/OutB. One of these output signals becomes at substantially the same potential as the power source potential Vterm, and the other output signal becomes at a potential dropped by ΔV from the power source potential Vterm. The potential drop ΔV corresponds to a voltage dropped based on the output resistor R1 or R2. When a resistance of the output resistors R1 and R2 is R, the potential drop ΔV is defined as R×I. When the resistance R of the output resistors R1 and R2 is set to 50Ω and also when a constant current I is set to 4 mA, for example, this ΔV becomes 200 mV.
As explained with reference to FIG. 16A, one of the input transistors T1 and T2 constituting the differential output circuit is in the on state without exception. That is, a current is always flowing, not like the current flowing only at timing when a logic level of the signal changes in the single end system. Therefore, power consumed by one differential output circuit is given by Vterm×I regardless of a data transmission rate. When N differential output circuits are provided, power consumption is expressed as N×Vterm×I.
As described above, a conventional signal transmission circuit using a differential output circuit has a problem of power consumption increase in proportion to the number of differential output circuits.